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Memory hierarchy
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61	MemProf: a Memory Profiler for NUMA Multicore Systems Renaud Lachaize† UJF Baptiste Lepers† CNRS Add to Reading List Source URL: www.usenix.org Language: English - Date: 2015-05-28 21:01:46 Parallel computing Software optimization Memory management C dynamic memory allocation Shared memory Memory hierarchy Non-Uniform Memory Access Profiling C Computing Computer programming Computer memory
62	Who Cares About the Memory Hierarchy? CS252 Graduate Computer Architecture Lecture 4 Add to Reading List Source URL: www.cs.berkeley.edu Language: English - Date: 2003-06-11 14:31:47 Cache Central processing unit CPU cache Alpha 21164 Memory hierarchy Dynamic random-access memory Compiler optimization Write buffer Cache algorithms Computer memory Computer hardware Computing
63	Microsoft PowerPoint - CPU Caches.pptx Add to Reading List Source URL: www.aristeia.com Language: English - Date: 2015-01-10 11:21:48 Computing Computer architecture CPU cache Cache Translation lookaside buffer Memory hierarchy Computer memory Computer hardware Central processing unit
64	Exponential Memory-Bound Functions for Proof of Work Protocols Technical Report A/370/CRI version 3 Fabien Coelho () ´ CRI, Ecole Add to Reading List Source URL: www.cri.ensmp.fr Language: English - Date: 2006-11-07 05:21:26 CPU cache Cache Memory hierarchy Lookup table Proof-of-work system Parallel computing Transmission Control Protocol Algorithm Computer memory Computing Memory bound function
65	The Cache Performance of Blocked Monica S. Lam, Add to Reading List Source URL: suif.stanford.edu Language: English - Date: 2003-10-16 22:29:20 Computer hardware Compiler optimizations CPU cache Central processing unit Data Memory hierarchy Cache-oblivious algorithm Loop tiling Cache Computer memory Computing
66	Lecture 10: Memory Hierarchy—3 Cs and 7 Ways to Reduce Misses Professor David A. Patterson Computer Science 252 Spring 1998 Add to Reading List Source URL: www.cs.berkeley.edu Language: English - Date: 1998-02-26 13:05:55 Computing Cache CPU cache Alpha 21164 Dynamic random-access memory Memory hierarchy Computer architecture Computer memory Computer hardware Central processing unit
67	FPGA Implementation of a Configurable Cache/Scratchpad Memory with Virtualized User-Level RDMA Capability George Kalokerinos, Vassilis Papaefstathiou, George Nikiforos, Stamatis Kavadias, Manolis Katevenis, Dionisios Pne Add to Reading List Source URL: www.ics.forth.gr Language: English - Date: 2013-12-23 07:16:59 CPU cache Scratchpad memory Direct memory access Cache Remote direct memory access AMD 10h Memory hierarchy Cell Synchronous dynamic random-access memory Computer memory Computer hardware Computing
68	Prototyping a Configurable Cache/Scratchpad Memory with Virtualized User-Level RDMA Capability George Kalokerinos, Vassilis Papaefstathiou, George Nikiforos, Stamatis Kavadias, Manolis Katevenis, Dionisios Pnevmatikatos Add to Reading List Source URL: www.ics.forth.gr Language: English - Date: 2013-12-23 07:16:59 Scratchpad memory CPU cache Remote direct memory access Direct memory access Cache Memory hierarchy Computer memory Computer hardware Computing
69	A run-time Configurable Cache/Scratchpad Memory with Virtualized User-Level RDMA Capability George Nikiforos, George Kalokairinos, Vassilis Papaefstathiou, Stamatis Kavadias, Dionisis Pnevmatikatos and Manolis Katevenis Add to Reading List Source URL: www.ics.forth.gr Language: English - Date: 2013-12-23 07:16:59 CPU cache Scratchpad memory Direct memory access Cache AMD 10h Memory hierarchy Cell Computer hardware Computer memory Computing
70	MEMORY HIERARCHY DESIGN FOR STREAM COMPUTING A DISSERTATION SUBMITTED TO THE DEPARTMENT OF ELECTRICAL ENGINEERING AND THE COMMITTEE ON GRADUATE STUDIES Add to Reading List Source URL: cva.stanford.edu Language: English - Date: 2005-12-01 13:38:06 Microprocessors GPGPU Central processing unit Stream processing Parallel computing Cell Microarchitecture Granularity Stream Processors Inc Computer architecture Computing Computer engineering

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